BoxView IDE Notes
G1 Hardware Mode Debugging

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G1 HW Debugging

G1 Example

 
 

G1 Debugging in Hardware Mode

Hardware debugging is the build-in mechanism used to stop the core from running on the target, permitting a scan of the target device.  This is different than software mode debugging, because in software mode when a breakpoint is encountered, the target is still running its monitor code.

The ZSP has mapped the registers to indicate the bits used to make up each register.  In hardware mode debugging the ZSP map file is used to report on the state of the registers.  In hardware mode debugging users can read and write any register, but they cannot access memory.

Since memory cannot be accessed once a hardware breakpoint is hit, BoxView IDE uses Cache to hold desired memory ranges prior to the hardware break; once the break has hit, the IDE displays the previously captured memory data in the windows; this is useful to represent the instructions being executed.

For G1, a hardware breakpoint can be defined based on:

  • Instruction Address - Break will occur after defined instruction executes
  • Data Store Address -Break will occur when  write occurs at defined data address
  • Data Value -Break will occur when write of the defined value occurs
  • AND Result -Break will occur when write occurs at the defined data address AND for the defined data value

Once the hardware break occurs, users can cycle step through their code.  Note, instruction stepping is implemented in software debugging; cycle stepping is used in hardware debugging.  Multple instructions may be executed per cycle; this is reflected by the value of the program counter which represents the latest fetch address.

The following steps should be followed when using hardware debugging mode:

  1. Perform Open Connection to target
  2. Initialize the target by starting a software debug session to load
  3. Enable cache to capture memory range of interest
  4. Load mapfile and enable hardware breakpoint
  5. Run the program in software mode
  6. After hardware break occurs, cycle step through code

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G1 Example

i

Create a new BoxView project and import the files below.   

Edit the Project Properties for your new project.  In the ZSP Build tab - the ZSP Linker's General section,  check the option for No Standard Libraries.  In the ZSP Assembler's General section, check the options for No Standard Libraries and No Standard Includes. Build the project.

1

Change to a ZSP Debug Perspective.   Perform an Open Connection  for your G1 Target by selecting BoxView->Open Connection.  Define the Interface type and choose Ok .

2

Initialize the target: create a Software Debug Configuration for your project.  Select Run->Debug... In the Debug dialog, create a new debug configuration by choosing the New button.  Name the configuration and select the associated project and output file.  In the Debugger tab, check the box to Do Not Run after Load. Select the Debug  button to run the configuration.

3

For the purposes of this example we are interested in the memory containing the instructions.  To enable the cache with this memory range, so it can be displayed in the code window once the hardware breakpoint occurs, issue the following in the Command Window:

  • CACHE P:0#400 <enter>  (define region)
  • CACHE READ <enter>  (reads cache from target)
  • CACHE ON <enter>  (enables cache substitution)

4

To set a hardware breakpoint for a G1 target,. Once the connection has been successfully established, select pull-down menu BoxView ->Hardware Break from the main BoxView IDE Window to display the ZSP Hw Break G1:

Click for Full Image 

Indicate the location of the core mapfile in the entryfield; use the File button to browse the disk. Note, several mapfiles are installed with BoxView IDE; they are located at  InstallDirectory\zspTools\mapfiles . Select the Enable HW Debug Mode checkbox to enable hardware breakpoints.  Select the radio button for Instruction Address and enter 0x106.  Press Apply.

5

In software mode, run the project.  This is done by pressing the green arrow in the debug window or selecting Run->Resume.

6

The application will stop at the configured hardware breakpoint.  The register values will be available for display, but memory cannot be read.   Open the Registers window by performing BoxView->Registers.  Right click in this window to select ZSP400, and add Section Operand registers.  The PC points to the fetch address, so any register changes will be delayed by a few execution cycles.  Observe the register values.

The code window will use the cache to display the executing instructions.  Open a code window by performing BoxView->Code. Users can cycle step through the code by enabling the Instruction step mode; select the 'i' icon in the Debug window.  After each cycle step the PC will point to the fetch address, so register changes will show a couple of steps later, following the pipeline progress.

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